A simple de-embeding method for on-wafer RF CMOS FET using two microstrip lines

This letter deals with the de-embedding of on-wafer CMOS FETs embedded in symmetrical and reciprocals pads. A de-embedding method, that uses a calibrated vector network analyzer and two microstrip lines fabricated on a lossy SiO2-Si substrate, is introduced. The proposed method not only allows the characterization on the interconnection lines but also allows the characterization of the CMOS pads. Our results demonstrate that a shunt admittance does not suffice to properly model CMOS pads. Experimental S-parameters data of on-wafer CMOS FETs de-embedded with the proposed L-L method, Mangan and the Pad-Open-Short De-embedded (PSOD) methods are compared. The S-parameter data, de-embedded with the PSOD and the proposed two-tier L-L show high correlation, validating the proposed de-embedding method.